Tanay Anand
I'm an undergrad at RPI who likes working close to the hardware — writing RTL for tensor accelerators, tightening kernels for neural-net workloads, and building embedded systems from firmware up. Lately I've been measuring how far you can push small models before the numbers stop adding up.
Publications
Weight Precision and Answer Selection
A local study of how 4-bit and 8-bit weight quantization changes arithmetic-answer selection in two small language-model judges. Includes measured results, uncertainty intervals, selective rescoring, a numerical control, and reproducible code and data.
Research manuscript · September 2026
Experience
- Led project-based engineering instruction for approximately 30 students building individual embedded-control projects, including robotic arms.
- Mentored hands-on project development, helping students connect programming concepts with the behavior of physical systems.
- Supported iterative testing and troubleshooting as students developed and refined their engineering projects.
- Shadowed telemetry engineers to learn how networking-system data supports monitoring, fault isolation, and debugging.
- Contributed limited implementation work under guidance while learning the team's telemetry analysis and validation workflows.
- Developed an understanding of how software tools help engineers investigate system behavior and diagnose networking issues.
- Taught programming through hands-on projects, emphasizing control flow, state, and systematic debugging — foundations that carry into embedded software development.
- Helped students break programs into smaller components, trace execution, and compare expected behavior with actual results.
- Developed and refined lessons in Python, Java, and Scratch, adapting technical explanations to different experience levels.
- Supported hands-on microcontroller programming in C, connecting firmware logic with GPIO, timers, interrupts, and finite state machines.
- Guided students through embedded-control labs involving sensor inputs, motor control, and hardware-software integration.
- Helped troubleshoot firmware and hardware setups, including serial communication, interrupt handling, and timing-sensitive behavior.
- Explained how real-time constraints and limited hardware resources shape embedded-system design and testing.
Education
Rensselaer Polytechnic Institute
Machine Learning • Operating Systems • Distributed Systems • Computer Networks • Data Structures & Algorithms • Parallel Computing • Embedded Control • Computer Architecture
Carnegie Mellon Pre-College
Programmer (Unity C#), Developer & Audio Engineer. Built game prototypes in collaborative team environments using industry-standard tools.
Skills & Tools
Selected Projects
Systolic Lab: Testing a Tensor Engine
Verification extension of RVTensor’s 4×4 systolic array. Cocotb checks 105 signed matrix products and 24,000 cycle-by-cycle processing-element results, including randomized stalls and resets. Includes reproducible reports and a 30-second simulation demo. FPGA board validation is pending.
RVTensor: RISC-V Tensor Accelerator
SystemVerilog SoC with an RV32I control core, 4×4 systolic array, scratchpad SRAM, and DMA. Includes a tensor-graph compiler and RTL checks against NumPy reference outputs.
Roadwatch: Pothole Detection
Camera-based pothole and speed-bump detection with a YOLO training and inference pipeline. Supports model export to ONNX and NCNN for deployment on a Raspberry Pi.
4-Bit Synchronous Counter
A synchronous binary counter project with reset, enable, and rollover behavior. Includes Wokwi project documentation and a Tiny Tapeout workflow for exploring digital design.
More Projects
SIMD Performance Lab
Reproducible C experiments comparing scalar and SIMD kernels. Measures AXPY and dot-product performance across working-set sizes, with compiler evidence and correctness checks.
Cache & Memory Lab
Pointer-chasing and concurrent memory-traffic experiments exploring latency, contention, and page locality. Includes raw measurements, analysis scripts, and explanations of measurement limits.
SSD Performance Lab
File-based fio experiments measuring storage throughput, IOPS, and latency across queue depths. Preserves configurations and raw results to make the measurements reproducible.
hwbench: ML Inference Benchmarking
A reproducible inference benchmark harness with latency percentiles, throughput, memory metrics, and saved environment details. CPU backend is working; CUDA validation and TTNN integration remain in progress.
Tensix Field Guide
A work-in-progress guide to Tenstorrent’s processor architecture, covering compute cores, local memory, data movement, and tiled execution. Connects plain-language explanations to primary technical sources.
Blind & Guide
A browser-based party game where one player sees the challenge and guides a partner through it. Uses shared game state, seeded rounds, and a server-authoritative multiplayer architecture.
Mini-Matching-Engine
A simplified electronic trading engine written in pure C for Linux. It accepts buy and sell limit orders from stdin or a file, maintains an in-memory order book, and matches orders using price-time priority
Transformer Scaling Explainer
Interactive tool modeling Transformer inference scaling. Adjust layers, sequence length, precision, and hardware to visualize latency, attention cost, and KV cache behavior in real time.
Neural Networks & LLM Visualizer
Explore tokenization, attention patterns, and internal representations of large language models with real-time visual feedback.